The Reliability of Memory with Single-Error Correction
IEEE Transactions on Computers
Erasure and Error Decoding for Semiconductor Memories
IEEE Transactions on Computers
Reliability and Performance of Error-Correcting Memory and Register Arrays
IEEE Transactions on Computers
Coding Schemes for Crisscross Error Patterns
Wireless Personal Communications: An International Journal
Error-correcting codes for semiconductor memory applications: a state-of-the-art review
IBM Journal of Research and Development
Fault-tolerant memory simulator
IBM Journal of Research and Development
A general-purpose memory reliability simulator
IBM Journal of Research and Development
kMemvisor: flexible system wide memory mirroring in virtual environments
Proceedings of the 22nd international symposium on High-performance parallel and distributed computing
Hi-index | 4.11 |
Although continuing cost and performance improvements of the new bipolar and MOS RAM devices are providing strong incentives for their greatly expanded use in mainframe memory and other storage applications, these components have not yet reached the degree of reliability required for large memory systems. Fortunately, however, memory system organization is compatible with a wide variety of low-cost fault detection and correction techniques6,10,11 that go a long way toward compensating for otherwise error-prone systems.