Reliability and Performance of Error-Correcting Memory and Register Arrays

Authors:
S. A. Elkind;D. P. Siewiorek
Affiliations:
Department of Electrical Engineering, Carnegie- Mellon University;-
Venue:
IEEE Transactions on Computers
Year:
1980

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Abstract

A brief survey of memory chip failure modes shows that partial chip failures are the dominant failure mode. A single error-correcting (SEC) code memory model is developed based on the results of the survey. The effect of memory support circuitry, often ignored, is included. Examples illustrate that the support circuitry dominates the memory system reliability for wide ranges of memory system parameters.