An algorithm for parallel computation of partial sums

Authors:
Adly T. Fam
Affiliations:
-
Venue:
CSC '84 Proceedings of the ACM 12th annual computer science conference on SIGCSE symposium
Year:
1984

Citing 1
Cited 1

Area-time complexity for VLSI

STOC '79 Proceedings of the eleventh annual ACM symposium on Theory of computing

Optimal Partitioning and Redundancy Removal in Computing Partial Sums

IEEE Transactions on Computers

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Abstract

An algorithm for parallel computation of several partial sums is proposed. The partial sums are partitioned into sets of r sums each. All sets are computed in parallel. In each set the redundancy shown to be inherent to the problem is utilized to reduce the required computation. In addition to a memory-accumulator architecture proposed earlier to implement this algorithm, a permuter-adder tree implementation is considered. Both approaches admit of implementation in VLSI, CCD or software form. The addition operation could be replaced by any commutative and associative binary operation, with implications for a wide class of applications.