Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
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This paper presents a framework for verifying compilationtools for parametrised hardware libraries with placementinformation. Such libraries are captured in Pebble, a simpledeclarative language based on Structural VHDL, and can containplacement information to guide circuit layout. Relative placementinformation enables control of circuit layout at a higher level ofabstraction than placement information in the form of explicitcoordinates. We provide a functional specification of a procedurefor compiling Pebble programs with relative placement informationinto Pebble programs with explicit placement coordinateinformation. We present an overview of the steps for verifying thisprocedure based on pass separation techniques. The compilationprocedure can be used in conjunction with partial evaluation tooptimise the size and speed of circuits described using relativeplacement. Our approach has been used for optimising a patternmatcher design, which results in a 33% reduction in resourceusage.