High-Level specification and automatic generation of IP interface monitors
Proceedings of the 39th annual Design Automation Conference
Efficient Generation of Monitor Circuits for GSTE Assertion Graphs
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
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We propose an approach to compositional verification of complex systems based on the interactions at the interfaces of the components. Interactions at an interface are first recognized by a finite automaton called interface recognizer/supplier (IRS). Programming IRS as supplier of the interactions allows us to simulate inter-actions of one side of the interface while model checking the other side. We formulate the composition rule and illustrate the method on an ATM switch module.