Slipstream Execution Mode for CMP-Based Multiprocessors

  • Authors:

  • Khaled Z. Ibrahim;Gregory T. Byrd;Eric Rotenberg

  • Affiliations:

  • -;-;-

  • Venue:
  • HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
  • Year:
  • 2003

Quantified Score

Hi-index 0.00

Visualization

Abstract

Scalability of applications on distributed shared-memory (DSM) multiprocessors is limited bycommunication overheads. At some point, using more processors to increase parallelism yields diminishing returns or even degrades performance. When increasing concurrency is futile, we propose an additional mode of execution, called slipstream mode, that instead enlists extra processors to assist parallel tasks by reducing perceived overheads.We consider DSM multiprocessors built from dual-processor chip multiprocessor (CMP) nodes with shared L2 cache. A task is allocated on one processor of each CMP node. The other processor of each node executes a reduced version of the same task. The reduced version skips shared-memory stores and synchronization, running ahead of the true task. Even with the skipped operations, the reduced task makes accurate forward progress and generates an accurate reference stream, because branches and addresses depend primarily on private data.Slipstream execution mode yields two benefits. First, the reduced task prefetches data on behalf of the true task. Second, reduced tasks provide a detailed picture of future reference behavior, enabling a number of optimizations aimed at accelerating coherence events, e.g., self-invalidation. For multiprocessor systems with up to 16 CMP nodes, slipstream mode outperforms running one or two conventional tasks per CMP in 7 out of 9 parallel scientific benchmarks. Slipstream mode is 12-19% faster with prefetching only and up to 29% faster with self-invalidation enabled.