Design of a Processing Element of a SIMD Computer for Genetic Algorithms

  • Authors:
  • Tomio Inoue;Masahiko Sano;Yoshizo Takahashi

  • Affiliations:
  • -;-;-

  • Venue:
  • HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
  • Year:
  • 1997

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Abstract

We have been investigating the efficiency of Genetic Algorithms (GA) for solving for a variety of real problems. During our investigations we have concluded that the large amount computational time required to find GA based solutions on conventional computers is restrictive. We are therefore developing an innovative new computer architecture, suitable for the solution of large scale problems using GAs. In this paper we introduce the SIMD-GA (Single Instruction stream Multiple Data stream Genetic Algorithm), and discuss its' hardware design and implementation. By taking advantage of the recent advances is HDLs (Hardware Description Language) and FPGA's (Field Programmable Gate Array) we have been able to quickly develop and prototype a PE (Processing Element) for a SIMD-GA. This approach allows us to build a cost-effective parallel processing architecture to overcome the problem of the computational time required for traditional sequential GA implementation.