Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
MuSiC: an event-flow computer for fast simulation of digital systems
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
The Yorktown Simulation Engine: Introduction
DAC '82 Proceedings of the 19th Design Automation Conference
Algebraic structure theory of sequential machines (Prentice-Hall international series in applied mathematics)
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The performance and efficiency of event driven simulations, such as VHDL and Verilog simulation, depend on the number of events that occur during the simulation. We classify events into two categories, sensitive events and insensitive events, according to the necessity of simulations, and also show a classification algorithm for both combinational logic circuits, and synchronous logic circuits and implement the optimization methodology that eliminates unnecessary simulations caused by the insensitive events. Five experiments show that optimized VHDL programs run about two times faster than the original ones.