ATUM: a new technique for capturing address traces using microcode
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
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ACM Transactions on Computer Systems (TOCS)
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ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
The impact of operating system structure on memory system performance
SOSP '93 Proceedings of the fourteenth ACM symposium on Operating systems principles
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ACM Transactions on Computer Systems (TOCS)
Generation and analysis of very long address traces
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Incomplete Trace Data and Trace Driven Simulation
MASCOTS '93 Proceedings of the International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
A national trace collection and distribution resource
ACM SIGARCH Computer Architecture News
Using the BACH trace collection mechanism to characterize the SPEC 2000 integer benchmarks
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Performance prediction of paging workloads using lightweight tracing
Future Generation Computer Systems - Systems performance analysis and evaluation
PSnAP: accurate synthetic address streams through memory profiles
LCPC'09 Proceedings of the 22nd international conference on Languages and Compilers for Parallel Computing
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Trace-driven simulation is commonly used to predict the performance of computer systems. However, existing tracing techniques produce traces inadequate for some studies: they do not usually record operating system references, and they produce relatively short traces. This paper explores the impact of these trace distortions on the performance estimates of uniprocessor memory hierarchies using multiprogramming workloads. We used a hardware monitor to capture traces under a variety of workloads and operating systems. Our monitor captures every reference and can record arbitrarily long traces. We quantify memory hierarchy performance using traces of the SPEC SDM1.1 benchmark suite executing on an i486 CPU. To evaluate variations due to operating systems, we compare these results under both Mach 3.0 and UNIX Sys V R4. We conclude that for current uniprocessors, long but incomplete traces result in modest errors in estimated performance, but for proposed architectures with large delays to main memory, the errors can be significant.