Space and time sharing of reconfigurable hardware for accelerated parallel processing
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
Virtualization of reconfigurable coprocessors in HPRC systems with multicore architecture
Journal of Systems Architecture: the EUROMICRO Journal
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The computational needs of an increasing number of applications often require dedicated circuits. Configurable devices. like the Field-Programmable Gate Arrays (FPGAs), are one of the most used solutions to implement such a hardware support. However, the size of the circuits that can be mapped on the currently-aLBailable FPGAs at a medium or low cost is limited with respect to the high demand of several applications. in particular when embedded systems and single-chip systems are concerned. This paper introduces some operating-system techniques (namely, partitioning and overlaying) to virtually enlarge the size of the FPGA from the point of view of the applications. The solutions mimic the approaches wide!\ used in the operating s,stems for the virtual memory.