Proceedings of the 14th international conference on Supercomputing
Reducing the complexity of the issue logic
ICS '01 Proceedings of the 15th international conference on Supercomputing
Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation
IEEE Transactions on Computers - Special issue on the parallel architecture and compilation techniques conference
A scalable instruction queue design using dependence chains
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Select-free instruction scheduling logic
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Energy-efficient hybrid wakeup logic
Proceedings of the 2002 international symposium on Low power electronics and design
Instruction Wake-Up in Wide Issue Superscalars
Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Improving quasi-dynamic schedules through region slip
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Supporting microthread scheduling and synchronisation in CMPs
International Journal of Parallel Programming
By-passing the out-of-order execution pipeline to increase energy-efficiency
Proceedings of the 4th international conference on Computing frontiers
A Non-blocking Multithreaded Architecture with Support for Speculative Threads
ICA3PP '08 Proceedings of the 8th international conference on Algorithms and Architectures for Parallel Processing
HeDGE: Hybrid Dataflow Graph Execution in the Issue Logic
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
Compiler directed issue queue energy reduction
Transactions on High-Performance Embedded Architectures and Compilers IV
| Hi-index | 0.00 |