A prototyping system for verification and evaluation in hardware-software cosynthesis

Authors:
T. Benner;R. Ernst;I. Konenkamp;P. Schuler;H.-C. Schaub
Affiliations:
-;-;-;-;-
Venue:
RSP '95 Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP'95)
Year:
1995

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Abstract

We present a system emulator for rapid prototyping of small embedded HW/SW-systems with hard timing constraints generated by a HW/SW cosynthesis system. It consists of a standard core processor and an application specific coprocessor, which is emulated by XILINX FPGAs. A byte slice architecture allows to emulate rather complex coprocessors. The system emulator supports the prototyping, debugging and time measurement in a comfortable way.