Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
An engineering environment for hardware/software co-simulation
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
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The design and joint simulation of the heterogeneous parts of a system in a unified environment offers many advantages including reduced system design and debug times as well as increased simulation accuracy. This paper presents a couple of flexible interfaces that have been implemented for bridging VHDL with electromechanical systems simulators (EMSS) and VHDL simulators with the application programs that control the digital circuit simulated in VHDL correspondingly. These interfaces are based on the use of VHDL interface components with generic structure that simplify the whole simulation procedure. The basic concepts and features used for these implementations are characterized by increased portability while other significant advantages of the proposed schemes are their speed, their flexibility in supporting various communication protocols and the simplified and fully automated simulation procedure which is transparent to the user.