A Hardware Virtual Machine for the Networked Reconfiguration

Authors:
Yajun Ha;Patrick Schaumont;Marc Engels;Serge Vernalde;Freddy Potargent;Luc Rijnders; Hugo de Man
Affiliations:
IMEC, Kapeldreef 75, Leuven 3001, Belgium and Department of Electrical Engineering, K. U. Leuven, Leuven 3001, Belgium;IMEC, Kapeldreef 75, Leuven 3001, Belgium;IMEC, Kapeldreef 75, Leuven 3001, Belgium;IMEC, Kapeldreef 75, Leuven 3001, Belgium;IMEC, Kapeldreef 75, Leuven 3001, Belgium;IMEC, Kapeldreef 75, Leuven 3001, Belgium;IMEC, Kapeldreef 75, Leuven 3001, Belgium and Department of Electrical Engineering, K. U. Leuven, Leuven 3001, Belgium
Venue:
RSP '00 Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000)
Year:
2000

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Abstract

Networked reconfiguration is an enabling technology for cost effective service deployment and maintenance. A hardware virtual machine to enable this networked reconfiguration is presented. An abstract FPGA model is the core of such a hardware virtual machine. Based on this abstract FPGA model, the traditional implementation flow of FPGA has been separated into two parts: the service provider's side and client's side. We show how to split the FPGA design flow to enable this networked reconfiguration and present first results in the efficiency of the bytefiles for a hardware virtual machine.