An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells

  • Authors:
  • L. Tambour;N. Zergainoh;P. Urard;H. Michel;A. A. Jerraya

  • Affiliations:
  • -;-;-;-;-

  • Venue:
  • RSP '03 Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP'03)
  • Year:
  • 2003

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Abstract

We present a methodology and design flow for signal processing application specific integrated circuit macro-cells. The key features of the methodology are the mastering thecomplexity of design, the increasing of reuse factor and the early error detection. It takes advantages of a derivative designs, a signal processing modularity, generic modelingand combines both levels of abstraction, in order to produce an efficient architecture. The flow includes a fast verification platform that drives both algorithm and architecture validation in an efficient way. We illustrate the effectiveness of the proposed methodology by a significant industrial application. Experimental design results indicate strong advantages of the proposed schemes.