Using the Alfa-1 simulated processor for educational purposes
Journal on Educational Resources in Computing (JERIC)
Experiences in modeling and simulation of computer architectures in DEVS
Transactions of the Society for Computer Simulation International - Recent advances in DEVS methodology--part II
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In this paper we exploit object technology to present the design and implementation of SIMx86, an execution-driven simulator for the 80/spl times/86 processor family. We begin by describing the design of a domain model for processor simulators. We demonstrate the extensibility of our design by extending it to include first the Intel 8088 processor and then the 8086 processor. We further demonstrate extensibility by incorporating debugging facilities into our simulator model. To evaluate the performance of our SIMx86 simulator we compare execution times with an existing simulator, the SimpleScalar sim-fast simulator. Our experiments indicate that SIMx86 is competitive with the sim-fast simulator. In most cases, the sim-fast simulator was about three times faster than SIMx86. However, the ease of modification, extension and maintenance provided by our design, offsets the performance gains provided by the traditional approach to simulator construction.