Experiences in modeling and simulation of computer architectures in DEVS

  • Authors:
  • Gabriel Wainer;Sergio Daicz;Alejandro Troccoli

  • Affiliations:
  • Department of Systems and Computer Engineering, Carleton University, 4456 Mackenzie Building, 1125 Colonel By Drive, Ottawa, ON. K1S 5B6. Canada;Departamento de Computación, FCEN-Universidad de Buenos Aires, Planta Baja. Pabellón I., Ciudad Universitaria (1428), Buenos Aires, Argentina;Departamento de Computación, FCEN-Universidad de Buenos Aires, Planta Baja. Pabellón I., Ciudad Universitaria (1428), Buenos Aires, Argentina

  • Venue:
  • Transactions of the Society for Computer Simulation International - Recent advances in DEVS methodology--part II
  • Year:
  • 2001

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Abstract

The use of traditional approaches to teach computer organization usually generates misconceptions in the students. The simulated computer ALFA-1 was designed to fill this gap. DEVS was used to attack this complex design of the chosen architecture, allowing for the definition and integration of individual components. DEVS also provided a formal specification framework, which allowed reduction of testing time and improvement of the development process. Using ALFA-1, the students acquired some practice in the design and implementation of hardware components, which is not usually achievable in computer organization courses.