Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation

  • Authors:
  • Venkatesan Muthukumar;Henry Selvaraj

  • Affiliations:
  • -;-

  • Venue:
  • VLSID '03 Proceedings of the 16th International Conference on VLSI Design
  • Year:
  • 2003

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Abstract

Functional decomposition is a process of splitting a complexcircuit into smaller sub-circuits. This paper deals withthe problem of determining the set of best free and boundvariables (variable partitioning problem) for disjoint (disjointserial) decomposition, such that the decomposed circuitsare smaller in size and its truth table representationhave maximal don't cares. A novel pruned breadth firstsearch (PBFS/IPBFS) approach is proposed to determinethe set of good variable partitions with minimal time andcomputational complexity. The heuristics proposed minimizethe size of the sub-functions. The proposed approachhas been successfully implemented and test with MCNC andEspresso benchmarks.