Design and Optimization of Large Size and Low Overhead Off-Chip Caches
IEEE Transactions on Computers
Destructive-read in embedded DRAM, impact on power consumption
Journal of Embedded Computing - Issues in embedded single-chip multicore architectures
Cache write-back schemes for embedded destructive-read DRAM
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
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With Micron's capability in integrating logic and DRAM in a single die, it has become possible at last to build a chip which has a large amount of DRAM and a substantial processing resource connected to it. This paper discusses Micron's current work in building a chip containing a large embedded DRAM, alongside a programmable processing resource in our active memory prototype, Yukon.