Considerations for Implementing IEEE 1149.1 on System-on-a-Chip Integrated Circuits

  • Authors:
  • Steven F. Oakland

  • Affiliations:
  • -

  • Venue:
  • ITC '00 Proceedings of the 2000 IEEE International Test Conference
  • Year:
  • 2000

Quantified Score

Hi-index 0.00

Visualization

Abstract

This paper addresses four issues associated with usingIEEE Standard 1149.1 on system-on-a-chip integrated circuits(SOC ICs). First, a new, simplified method for accessingdebug registers in processor cores embedded within ICsis presented. Second, structural information required byhardware/software processor development tools is presented.Third, issues associated with boundary-scandescription language (BSDL) are discussed. Finally, highspeedboundary-scan cells that avoid a multiplexer delayare presented.