Reuse methodology manual: for system-on-a-chip designs
Reuse methodology manual: for system-on-a-chip designs
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In this paper we present a design for IEEE 1149.1Test Access Port (TAP) controllers that is based ona practical reuse methodology. While the basic useand core functionality of TAP controllers are standardized, the RTL structure and user refinements of TAPs can vary widely, leading to incompatibilitiesand difficulties in reusing TAP controller IP acrossdesigns and between DFT suppliers.Upon study, we find that the TAP controller is anideal candidate for reuse: from the definitions andguidelines of the IEEE Standard we can construct acore architecture of required modules and fullydefine their interfaces. With the addition of a fewsimple usage and design guidelines, we can thendefine an "open architecture" TAP controller thatfacilitates rapid, automatic customization with alibrary of modular enhancements.