System-Level Performance Estimation Strategy for Sw and Hw

  • Authors:
  • Carlo Brandolese

  • Affiliations:
  • -

  • Venue:
  • ICCD '98 Proceedings of the International Conference on Computer Design
  • Year:
  • 1998

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Abstract

Using highly optimized, custom circuits and fast dynamic array control structures, a small team of designers at the IBM Austin Research Laboratory has developed a one gigahertz microprocessor. This paper describes the custom datapath circuit technology ...