A data cache with multiple caching strategies tuned to different types of locality
ICS '95 Proceedings of the 9th international conference on Supercomputing
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
ACM Computing Surveys (CSUR)
Application-adaptive intelligent cache memory system
ACM Transactions on Embedded Computing Systems (TECS)
Dynamic round-robin task scheduling to reduce cache misses for embedded systems
Proceedings of the conference on Design, automation and test in Europe
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This research proposes a new cache system that can increase the effect by temporal and spatial locality by using only simple hardware control without any locality detection hardware or compiler aid. The proposed cache system consists of two caches with different associativity and different block sizes, i.e., a direct-mapped cache with small block size and a fully associative spatial buffer with large block size as a multiple of small blocks. Therefore, the spatial locality can be exploited by aggressively fetching large blocks including any missed small block into the buffer, and the temporal locality can be exploited by selectively storing small blocks that were referenced at the spatial buffer in the past. To determine the blocks to be stored at the direct-mapped cache, the proposed cache system uses a time interval-based selection mechanism. According to the simulation results, similar performance can be achieved by using four times smaller cache size comparing with the conventional direct-mapped cache.