Evolutionary Synthesis of LogicCircuits Using Information Theory
Artificial Intelligence Review
An application of functional decomposition in ROM-based FSM implementation in FPGA devices
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
Evolutionary synthesis of logic circuits using information theory
Artificial intelligence in logic design
Synthesis of boolean functions using information theory
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
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This paper extends the technique of evolutionary network design. We study evolutionary network design strategy from the position of design style.A hypothesis under investigation is that the uncertainty of a total search space (the space of all possible network solutions) through evolutionary network design is removed faster if this space is partitioned into subspaces. This idea has been realized through a parallel window-based scanning of these subspaces. Such a window is determined by the parameters of a multi-level network architecture in a given design style. Our approach allows to synthesize networks with more than two hundred quaternary gates. Moreover, we show that information theoretical interpretation of the evolutionary process is useful, in particular, in partitioning of network space and measuring of fitness function.The experimental data with 6-input quaternary and 11-inputs binary benchmarks demonstrate the efficiency of our program, EvoDesign, and an improvement against the recently obtained results.