Statistical crosstalk aggressor alignment aware interconnect delay calculation
Proceedings of the 2006 international workshop on System-level interconnect prediction
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With continuing scaling of CMOS process, process variationsin the form of die-to-die and within-die variations become significantwhich cause timing uncertainty. This paper proposes amethod of analytically analyzing statistical behavior of multiplecoupled interconnects with an uncertain signal arrival time ateach interconnect input (aggressors and the victim). The methodutilizes delay change characteristics due to changes in relative arrivaltime between an aggressor and the victim. The results showthat the proposed method is able to accurately predict delay variationsthrough a coupled interconnect.