CAD for nanometer silicon design challenges and success
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Nanoelectronic circuits and systems
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As the portion of coupling capacitance increases insmaller process geometries, accurate coupled noiseanalysis is becoming more important in current designmethodologies. We propose a method to determinewhether aggressors can potentially switch simultaneouslywith the victim or not. The functional information is usedto classify the aggressors. Our functional pruningalgorithm inspects the conflict of the net states usingCNF(Conjunction Normal Form) and BDD(BinaryDecision Diagram). We present the experimental resultson several industrial circuits. In the experiments, 6.4% oftotal aggressors are false and the accuracy of delaycalculation can be improved up to 36.6%.