Automatic module allocation in high level synthesis
EURO-DAC '92 Proceedings of the conference on European design automation
Cosimulation of real-time control systems
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Debugging of behavioral VHDL specifications by source level emulation
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
A backplane approach for cosimulation in high-level system specification environments
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
A prototyping environment for hardware/software codesign in the COBRA project
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Co-emulation and debugging of HW/SW-systems
ISSS '97 Proceedings of the 10th international symposium on System synthesis
ICEBERG: an embedded in-circuit emulator synthesizer for microcontrollers
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
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In this paper we discuss, what breakpoints in Source Level Emulation are, how we can work with them and how we have to change the cicuit generated by high level synthesis to do so. We show the details of breakpoint encoding and detection in our approach. The presented approach allows for breakpoint detection by hardware means without seriously slowing down the circuit or dramatically increasing its size.