Optimizing Digital Hardware Perceptrons for Multi-Spectral Image Classification

  • Authors:
  • Reid Porter;Neal Harvey;Simon Perkins;James Theiler;Steven Brumby;Jeffrey Bloch;Maya Gokhale;John Szymanski

  • Affiliations:
  • Nonproliferation and International Security Division, Los Alamos National Laboratory, New Mexico. rporter@lanl.gov;Nonproliferation and International Security Division, Los Alamos National Laboratory, New Mexico;Nonproliferation and International Security Division, Los Alamos National Laboratory, New Mexico;Nonproliferation and International Security Division, Los Alamos National Laboratory, New Mexico;Nonproliferation and International Security Division, Los Alamos National Laboratory, New Mexico;Nonproliferation and International Security Division, Los Alamos National Laboratory, New Mexico;Nonproliferation and International Security Division, Los Alamos National Laboratory, New Mexico;Nonproliferation and International Security Division, Los Alamos National Laboratory, New Mexico

  • Venue:
  • Journal of Mathematical Imaging and Vision
  • Year:
  • 2003

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Abstract

We propose a system for solving pixel-based multi-spectral image classification problems with high throughput pipelined hardware. We introduce a new shared weight network architecture that contains both neural network and morphological network functionality. We then describe its implementation on Reconfigurable Computers. The implementation provides speed-up for our system in two ways. (1) In the optimization of our network, using Evolutionary Algorithms, for new features and data sets of interest. (2) In the application of an optimized network to large image databases, or directly at the sensor as required. We apply our system to 4 feature identification problems of practical interest, and compare its performance to two advanced software systems designed specifically for multi-spectral image classification. We achieve comparable performance in both training and testing. We estimate speed-up of two orders of magnitude compared to a Pentium III 500 MHz software implementation.