Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Characterization and modeling of run-time techniques for leakage power reduction
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Nanoelectronic circuits and systems
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Static and dynamic power for strained-Si device is analyzed and compared with conventional bulk-Si technology. Optimum device design points are suggested with controlling physical/structural device parameters. Strained-Si CMOS circuits are studied, showing substantially-reduced power consumptions due to unique advantageous features of strained-Si device. The trade-offs for power and performance in strained-Si devices/circuits are discussed. Further, analysis and low-power design points are applied and extended to strained Si on SOI substrate (SSOI) CMOS technology.