Interprocedural aliasing in the presence of pointers
Interprocedural aliasing in the presence of pointers
Points-to analysis in almost linear time
POPL '96 Proceedings of the 23rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Model checking
Bandera: extracting finite-state models from Java source code
Proceedings of the 22nd international conference on Software engineering
Verification of time partitioning in the DEOS scheduler kernel
Proceedings of the 22nd international conference on Software engineering
An improvement in formal verification
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
A Formal Study of Slicing for Multi-threaded Programs with JVM Concurrency Primitives
SAS '99 Proceedings of the 6th International Symposium on Static Analysis
ASE '00 Proceedings of the 15th IEEE international conference on Automated software engineering
Formal Methods in System Design
CHET: A System for Checking Dynamic Specifications
Proceedings of the 19th IEEE international conference on Automated software engineering
Specifying and checking component usage
Proceedings of the sixth international symposium on Automated analysis-driven debugging
Testing concurrent programs using value schedules
Proceedings of the twenty-second IEEE/ACM international conference on Automated software engineering
Towards a better collaboration of static and dynamic analyses for testing concurrent programs
PADTAD '08 Proceedings of the 6th workshop on Parallel and distributed systems: testing, analysis, and debugging
Simulation-directed invariant mining for software verification
Proceedings of the conference on Design, automation and test in Europe
Checking Event-Based Specifications in Java Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
Taming reflection: Aiding static analysis in the presence of reflection and custom class loaders
Proceedings of the 33rd International Conference on Software Engineering
Identifying future field accesses in exhaustive state space traversal
ASE '11 Proceedings of the 2011 26th IEEE/ACM International Conference on Automated Software Engineering
Using model checking to analyze the system behavior of the LHC production grid
Future Generation Computer Systems
| Hi-index | 0.00 |
We present an iterative technique in which model checkingand static analysis are combined to verify large softwaresystems. The role of the static analysis is to compute partialorder information which the model checker uses to reducethe state space. During exploration, the model checker alsocomputes aliasing information that it gives to the static analyzerwhich can then refine its analysis. The result of thisrefined analysis is then fed back to the model checker whichupdates its partial order reduction. At each step of this iterativeprocess, the static analysis computes optimistic informationwhich results in an unsafe reduction of the statespace. However, we show that the process converges to afixed point at which time the partial order information issafe and the whole state space is explored.