Enhancing BIST Quality of Sequential Machines through Degree-of-Freedom Analysis

Authors:
Biplab K. Sikdar;Samir Roy;Debesh K. Das
Affiliations:
-;-;-
Venue:
ATS '01 Proceedings of the 10th Asian Test Symposium
Year:
2001

Citing 0
Cited 2

Exploiting Ghost-FSMs as a BIST Structure for Sequential Machines

VLSID '03 Proceedings of the 16th International Conference on VLSI Design
A Degree-of-Freedom Based Synthesis Scheme for Sequential Machines with Enhanced BIST Quality and Reduced Area

Journal of Electronic Testing: Theory and Applications

Quantified Score

Hi-index	0.00

Visualization

Abstract

Designing BIST structure for sequential circuits is rather a complex problem as some states remain unreachable and some act as the sink under any input sequence. This paper reports an efficient scheme to provide uniform mobility, referred to as degree of freedom, in a sequential machine by enhancing the reachability as well as the emitability of the states. The uniform mobility of states ensures higher fault efficiency in a BIST structure of the circuit. Moreover, as a non-scan scheme, the technique provides lower test application time and at-speed testing.