Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling

Authors:
L. Ding;P. Mazumder
Affiliations:
Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor, MI;Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor, MI
Venue:
Proceedings of the conference on Design, automation and test in Europe
Year:
2002

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Cited 1

Characterizing the VCO jitter due to the digital simultaneous switching noise

GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI

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Abstract

In this paper, we study the simultaneous switching noiseproblem by using an application-specific modeling method.A simple yet accurate MOSFET model is proposed in orderto derive closed-form formulas for simultaneous switchingnoise voltage waveforms. We first derive a simple formulaassuming that the inductances are the only parasitics. Andthrough HSPICE simulation, we show that the new formulais more accurate than previous results based on the sameassumption. We then study the effect of the parasitic capacitancesof ground bonding wires and pads. We showthat the maximum simultaneous switching noise should becalculated using four different formulas depending on thevalue of the parasitic capacitances and the slope of the inputsignal. The proposed formulas, modeling both parasiticinductances and capacitances, are within 3% of HSPICEsimulation results.