Phase noise in oscillators: a unifying theory and numerical methods for characterisation
DAC '98 Proceedings of the 35th annual Design Automation Conference
Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling
Proceedings of the conference on Design, automation and test in Europe
Ground bounce in digital VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We study the simultaneous switching noise(SSN) generated by the digital I/O buffers and its impact on VCO. A simple yet accurate model is developed to analyze the ground bounce and power supply fluctuation in each region respectively. Calculation results with the models show good agreements with HSPICE simulation results. Based on the noise model, we investigate the SSN effects on the timing jitter of a current starved VCO. In this study, the RMS jitter and jittery signal spectrum are characterized.