Interval-valued reduced order statistical interconnect modeling
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
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The relative tolerances for interconnect and device parametervariations have not scaled with feature sizes which have broughtabout significant performance variability. As we scale toward10nm technologies, this problem will only worsen. New circuitfamilies and design methodologies will emerge to facilitate construction of reliable systems from unreliable nanometer scalecomponents. Such methodologies require new models of performance which accurately capture the manufacturing realities.Recently, one step toward this goal was made via a new variational reduced order interconnect model that efficiently captures large scale fluctuations in global parameter values. Usingvariational calculus the linear interconnect systems are represented by analytical models that include the global variationalparameters explicitly. In this work we present a framework whichextends the previous work to a linear-centric simulation methodology with accurate nonlinear device models and their fluctuations. The framework is applied to generate path delaydistributions under nonlinear and linear parameter fluctuations.