Communications of the ACM - Special section on computer architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
SPIRE: streaming processing with instructions release element
ACM SIGARCH Computer Architecture News
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A scientific parallel processor called the R256 has been developed. The R256 is composed of 16x16 processing elements, and has the outstanding features of a “distributed parallel network” as well as on IEEE 80-bit extended floating point computation ability. The computation accuracy, required by an exhaustive number of iterations in scientific computations, is resolved by the dedicated 80-bit VLSI processor, which was developed here for the R256. The innovative distributed parallel network was designed so as to effectively resolve heavy communication problems, which are found in applications based on the Monte Carlo simulation technique. The R256 network was very economical at a hardware cost of √N-folds (16 folds in this case) to that of an ideal full-crossbar switch, at the same time keeping the rates comparable to that of an ideal switch. The R256 demonstrates high performance of 2-GB/s data transfer rates and 500-MFLOPS computation rates on a semiconductor device simulation application.