High-level power modeling, estimation, and optimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
Power estimation of behavioral descriptions
Proceedings of the conference on Design, automation and test in Europe
POPL '12 Proceedings of the 39th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
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Computing the entropy of a digital circuit has proved to be very useful for several applications in the area of VLSI system design. Recently, a method for entropy calculation has been used in the context of power estimation for logic circuits described at the register-transfer level. The technique has shown to be reasonably effective concerning the trade-off between the accuracy of the estimates produced and the execution time. However, the assumptions required to make the computation feasible are such that the obtained results are approximate. In this paper, we propose a symbolic algorithm for the exact calculation of the entropy of alogic circuit which is able to handle reasonably large examples without introducing any approximation. We present experimental data on standard benchmark designs in orderto show the eflectiweness of the new method; in addition, we compare our results to the ones obtained with the approximate approach. As a result, we observe a marginal penaltyin the performance of the symbolic procedure; on the other hand, accuracy in the calculation increases significantly.