Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions
Journal of VLSI Signal Processing Systems
Iris localization in frontal eye images for less constrained iris recognition systems
Digital Signal Processing
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Abstract: Multimedia processing is becoming increasingly important with a range of applications. Existing approaches for processing multimedia data can be broadly classified into two categories, namely (i) Microprocessors with extended media processing capabilities, and (ii) Dedicated implementations (ASICs). The complexity, variety of techniques and tools associated with multimedia processing points to the opportunities for Reconfigurable computing devices which will be able to adapt the underlying hardware dynamically in response to changes in the input data or processing environment. This paper proposes a novel approach to design a dynamically reconfigurable processor by performing hardware software codesign for a media processing application. As an example, the analysis of the Shape coding module of MPEG-4 is chosen to demonstrate the potential for reconfigurability.