Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
Array processor with multiple broadcasting
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Performance based design and analysis of multimicrocomputer networks
Performance based design and analysis of multimicrocomputer networks
Parallel architectures for problem solving (prolog, logic-programming, interconnection, network)
Parallel architectures for problem solving (prolog, logic-programming, interconnection, network)
| Hi-index | 0.00 |
Two dimensional interconnection schemes have some inherent advantages because of their linear area and constant wire-lengths. The nearest-neighbor mesh is such a topology that has enjoyed a widespread acceptance. We investigate a family of bus-based topologies called the doble-lattice-meshes, and propose a variation to improve their properties. We show that the bus-based topologies perform better than the mesh for a variety of communicaion structures. In particular, when global communication is needed, they provide larger effective bandwidth, and when localized communication is permissible, they provide largest neighborhoods for a given communication capacity.