The concurrency workbench: a semantics-based tool for the verification of concurrent systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Verification of an audio control protocol within real time process algebra
FMSP '98 Proceedings of the second workshop on Formal methods in software practice
Dynamic Scheduling and Fault-Tolerance: Specification andVerification
Real-Time Systems
Submodule Construction for Specifications with Input Assumptions and Output Guarantees
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
Submodule Construction and Supervisory Control: A Generalization
CIAA '01 Revised Papers from the 6th International Conference on Implementation and Application of Automata
An efficient method for protocol conversion
ICCCN '95 Proceedings of the 4th International Conference on Computer Communications and Networks
Component Verification with Automatically Generated Assumptions
Automated Software Engineering
Progressive solutions to a parallel automata equation
Theoretical Computer Science
Controllable Delay-Insensitive Processes
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
Residual for Component Specifications
Electronic Notes in Theoretical Computer Science (ENTCS)
Generalizing the submodule construction techniques for extended state machine models
FORTE'06 Proceedings of the 26th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Submodule construction for extended state machine models
FORTE'05 Proceedings of the 25th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Factorization for component-interaction automata
SOFSEM'12 Proceedings of the 38th international conference on Current Trends in Theory and Practice of Computer Science
Testing in context: framework and test derivation
Computer Communications
Controllable Delay-Insensitive Processes
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
Using logic to solve the submodule construction problem
Discrete Event Dynamic Systems
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