Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Highly selective HBr etch process for fabrication of triple-gate nano-scale SOI-MOSFETs
Microelectronic Engineering - Proceedings of the 29th international conference on micro and nano engineering
| Hi-index | 2.88 |
The fabrication and characterization of nanoscale n- and p-type multi-wire metal-oxide semiconductor field effect transistors (MOSFETs) with a triple gate stracture on silicon-on-insulator material (SOI) is described in this paper. Experimental results are compared to simulation with special emphasis on the influence of channel width on the subthreshold behavior. Experiment and simulation show that the threshold voltage depends strongly on the wire width at dimensions below 100 nm. It is further shown that the transition from partial to full channel depletion is dependent on channel geometry. Finally, an increased on-current per chip area is demonstrated for triple-gate SOI MOSFETs compared to planar SOI devices.