Towards a Higher Level of Abstraction in Hardware/Software Co-Simulation
ICDCSW '04 Proceedings of the 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04) - Volume 7
Reactive framework for resource aware distributed computing
ASIAN'04 Proceedings of the 9th Asian Computing Science conference on Advances in Computer Science: dedicated to Jean-Louis Lassez on the Occasion of His 5th Cycle Birthday
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There is a growing demand for software tools that canassist in designing, analyzing and validating embeddedreal-time system applications.ESTEREL a synchronouslanguage, is widely used in the development of embeddedsystems and hardware/software codesign.In this paper,we describe a method that uses timed annotations for ESTEREL programs that makes it possible to predict the Timing constraints required to be satisfied by the embeddedsystem. Using the specified annotations and the programmingenvironment of ESTEREL we describe a method and a tool for validating the concrete realization relative to time-annotatedESTEREL specifications.Also, the method derives time constraints to be satisfied by the concrete architecturesfor realizing the logical specification. We shall illustratethe technique with examples as well as the structureof the tool implemented.