RT-level Fault Simulation Based on Symbolic Propagation

  • Authors:
  • Ozgur Sinanoglu;Alex Orailoglu

  • Affiliations:
  • -;-

  • Venue:
  • VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
  • Year:
  • 2001

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Abstract

The rapid rise in size and complexity of VLSI circuits has stimulated a need to handle fault simulation at higher levels of abstraction. We outline an RT-level fault simulation technique that utilizes symbolic data to group fault effects. Experimental results show that the proposed methodology provides superior speed-ups and accurate fault coverages.