Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-outs

  • Authors:
  • Yi-Shing Chang;Sandeep Gupta;Melvin Breuer

  • Affiliations:
  • -;-;-

  • Venue:
  • VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
  • Year:
  • 2001

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Abstract

Due to technology scaling and increasing clock rate, problems due to noise effects lead to an increase in design and test efforts and a decrease in circuit performance. This paper addresses the problem of efficiently and effectively generating two vector tests to produce the maximum ground bounce in a circuit. We have developed a branch and bound procedure that can find a good quality test for maximum ground bounce in a rather short time. Comparison of results with SPICE simulations confirms the quality of tests obtained by our procedure.