Parameterised system design based on genetic algorithms
Proceedings of the ninth international symposium on Hardware/software codesign
| Hi-index | 0.00 |
For high performance processor design, cache memory size is an important parameter which directly affects performance and the chip area. Modeling performance and area is required for design tradeoff of cache memory. This paper describes a tool which calculates cache memory performance and area. A designer can try a variety of cache parameters to complete the specification of a cache memory. Data examples calculated using this tool are shown.