Compiler-Directed Cache Assist Adaptivity
ISHPC '00 Proceedings of the Third International Symposium on High Performance Computing
Compiler-Directed Cache Line Size Adaptivity
IMS '00 Revised Papers from the Second International Workshop on Intelligent Memory Systems
Simulation bridge: a framework for multi-processor simulation
Proceedings of the tenth international symposium on Hardware/software codesign
Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Improving Lookahead in Parallel Multiprocessor Simulation Using Dynamic Execution Path Prediction
Proceedings of the 20th Workshop on Principles of Advanced and Distributed Simulation
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This paper describes various aspects of the augmentation-based SPARC simulator (ABSS). We discuss (1) the problems that we solved in porting AugMINT to the SPARC platform to create ABSS, (2) the major sections of ABSS, and (3) the limitations of ABSS.