Extending Statecharts with Temporal Logic
IEEE Transactions on Software Engineering
Specification of real-time and hybrid systems in rewriting logic
Theoretical Computer Science - Rewriting logic and its applications
Formal Analysis of Real-Time Systems with SAM
ICFEM '02 Proceedings of the 4th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Reactive and Real-Time Systems Course: How to Get the Most Out of it
Real-Time Systems
Fundamenta Informaticae - Fundamentals of Software Engineering 2007: Selected Contributions
An evaluation of timed scenario notations
Journal of Systems and Software
FSEN'07 Proceedings of the 2007 international conference on Fundamentals of software engineering
Formal verification of use case maps with real time extensions
SDL'07 Proceedings of the 13th international SDL Forum conference on Design for dependable systems
Early schedulability analysis with timed use case maps
SDL'09 Proceedings of the 14th international SDL conference on Design for motes and mobiles
Fundamenta Informaticae - Fundamentals of Software Engineering 2007: Selected Contributions
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This paper presents a new computational model for real-time systems, called the clocked transition system model. The model is a development of our previous timed transition model, where some of the changes are inspired by the model of timed automata. The new model leads to a simpler style of temporal specification and verification, requiring no extension of the temporal language. For verifying safety properties, we present a run-preserving reduction from the new real-time model to the untimed model of fair transition systems. This reduction allows the (re)use of safety verification methods and tools, developed for untimed reactive systems, for proving safety properties of real-time systems.