Multi-agent framework in visual sensor networks
EURASIP Journal on Applied Signal Processing
A VLSI architecture for image registration in real time
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient hierarchical motion estimation algorithm and its VLSI architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Motion estimation plays an important role in video compression to remove temporal redundancies between successive frames. It is also useful in aiding detection of moving objects. Full-search block-matching (FSBM) is the most preferred algorithm for motion estimation. Frame-level pipelined FSBM architectures have advantages over block-level pipelined architectures in their simpler control and reduced number of memory accesses. In this paper, a frame-level pipelined FSBM motion estimation array processor for large search range p = qN is presented where q 驴 陆 and N脳N is the block size.