Low energy memory and register allocation using network flow
DAC '97 Proceedings of the 34th annual Design Automation Conference
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Optimizing performance and power during the design ofembedded systems for real-time constrained applications isan important problem. This paper presents a network flowoptimization technique to analyze power and performancetradeoffs for memory component design of an embeddedsystem. The optimal number of external and internalmemory accesses, memory sizes, and the number of extracomputations (or data regeneration) for a number of tasksis determined. This is unlike previous research which hasonly discussed adhoc suggestions for this problem. Thenetwork flow approach can be solved to a globally optimalsolution in polynomial time using very fast and efficientalgorithms. Results for a large complex real industrialapplication, audio compression, donated by Motorola,show that this network flow technique provides up to 3.11and 1.44 times improvement in power and performancerespectively. This research is important for industry sincepower, performance, and cost consideration at the earlystages of design is crucial for mapping high-performanceapplications into cost-efficient and reliable systems.