System Design Verification Tests - An Overview

  • Authors:
  • Susana Stoica

  • Affiliations:
  • -

  • Venue:
  • ITC '99 Proceedings of the 1999 IEEE International Test Conference
  • Year:
  • 1999

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Abstract

The test engineering community has a goodunderstanding of physical tests (parametric,environmental, durability, key life tests, etc.) atcomponent level, i.e. what they are and what is thebest execution sequence.There are also welldefined methods for component characterization andEnd Of Line (EOL) validation using 1149.1 and1149.4.The same cannot be stated about systemlevel tests.The quality of the latter typicallydepends on the test engineer's experience and thetime available for writing the tests.This paper intends to define "system level test" and"functional test" as used in this paper, define the roleof functional test in system design verification, stateways in which functional verification/validation canbe achieved at different product integration stages,commenting on the commonalities and differencesbetween test requirements at different integrationstages, as well as how physical and functional testsshould be combined for optimum results (cost,program timing and coverage).