A Dependability-Driven System-Level Design Approach for Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A system-level approach to hardware reconfigurable systems
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Distributed Performance Control in Organic Embedded Systems
ATC '08 Proceedings of the 5th international conference on Autonomic and Trusted Computing
A software update service with self-protection capabilities
Proceedings of the Conference on Design, Automation and Test in Europe
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Recent research was mainly focused on the OS support for a single reconfigurable chip. This paper presents a general approach to manage fault tolerant distributed reconfigurable hardware. In order to run such a system, three basic tasks must be implemented: (i) rerouting to compensate line errors, (ii) rebinding to compensate node failures, and (iii) hardware reconfiguration to allow the optimization of these systems during runtime. This paper proposes first ideas and solutions of these management functions. Furthermore, a prototype implementation consisting of four fully connected FPGAs will be presented.